15th IEEE / ACM International Symposium on Nanoscale Architectures

17-19 July, 2019

Qingdao, China

News

About NANOARCH 2019

NANOARCH is the annual cross-disciplinary forum for the discussion of novel post-CMOS and advanced nanoscale CMOS directions. The symposium seeks papers on innovative ideas for solutions to the principal challenge faced by integrated electronics in the 21st century: How to design, fabricate, and integrate nanosystems to overcome the fundamental CMOS limitations? In particular, such systems could:

  •  Contain unconventional nanodevices with unique capabilities, e.g., beyond simple switch behavior
  •  Introduce new logic and memory concepts
  •  Involve novel circuit styles
  •  Introduce new computing concepts
  •  Explore security architectures with nanotechnology
  •  Reconfigure and/or mask faults at much higher rates than in CMOS
  •  Require design tools and methodologies fundamental rethinking

IEEE
ACM
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Camera-Ready Version


Final Submission Requirements
1. PDF eXpress compliant of the final version
2. A ZIP archive including all the source files you utilized for the creation of the final version.

Paper formatting
Final Papers must be in the formats described on submissions guidelines and using the IEEE templates that you can find at:
IEEE Manuscript Templates for Conference Proceedings

Do NOT include page numbers in your paper.
Do NOT include copyright header/footer information.
The deadline for camera ready and copyright form upload is June 15, 2019 (hard deadline).

PDF Check
Papers must be checked for PDF compatibility via IEEE PDF Express tool by using 47378Χ as Conference ID.
Instructions:
  • 1. Log in to the IEEE PDF eXpress™ site
  • 2. First-time users should do the following:
    • A. Select the New Users
    • B. Enter the following:
      • 47378Χ for the Conference ID
      • Your e-mail address
      • A Password
    • C. Continue to enter information as prompted. An online confirmation will be displayed and an email confirmation will be sent verifying your account setup.
  • 3. Previous users of PDF eXpress need to follow the above steps, but should enter the same password that was used for previous conferences. Verify that your contact information is valid.

Once the paper has been checked (you will be notified by an email if your file passed or failed), please log in to EasyChair for NANOARCH 2019 and submit the validated version of your manuscript, along with the ZIP archive with the source files of this version.
If you are having problems using PDF Express, please contact the Publication Chairs.

Call for Papers


This 15th symposium aims to incorporate several exciting sessions on emerging computing paradigms (e.g., approximate, quantum, neuromorphic, molecular, spintronic), novel nano-based computing architectures, 2D materials (e.g., graphene) nanoelectronics and computing, beyond charge-based computing, emerging memory devices and in memory computing, nanoelectronics for biomedical systems, and to provide extended opportunities for interaction among the participants. In addition to 6-page length Regular Papers, we also invite 2-page Concept Papers presenting less developed but radical and highly innovative work in the area of nanofabrication, nanocomputing, and emerging nanosystem application.

NANOARCH 2019 topics of interest (both theoretical and experimental) include (but are not limited to):

  •  Novel nanodevices and manufacturing/integration ideas with a focus on nanoarchitectures
  •  Nanoelectronic circuits, nanofabrics, computing paradigms and nanoarchitectures
  •  Future and emergent nano-computing paradigms, e.g., approximate, quantum, neuromorphic, molecular, spintronic
  •  Paradigms and nanoarchitectures for computing with unpredictable devices
  •  Emerging memory nano-devices and in memory computing nano-architectures
  •  Security architectures with nanofabrics
  •  Reliability aware computing
  •  2D/3D, hybrid, defect/fault tolerant architecture, integration, and manufacturing
  •  Nanodevice and nanocircuit models, methodologies and computer aided design tools
  •  Fundamental limits of computing at the nanoscale


Significant Dates

Special Session Proposals due: April 5, 2019

Special Session Notification of Acceptance: April 10, 2019

Regular / Special Session Paper Submission: May 12, 2019 - HARD-DEADLINE

Acceptance Notification: June 5, 2019

Camera-ready Version: June 15, 2019

Early Registration Deadline: June 15, 2019

Special Session Call


The NANOARCH 2019 technical program will include Special Sessions. Their objective is to complement the regular program with new or emerging topics that are of particular interest to practitioners and experts for highest performance at nanoscale architectures that may also cut across and beyond disciplines traditionally represented at NANOARCH.

We recall that, typically, each Special Session comprises at least 4 presentations. Prospective organizers of Special Sessions should submit proposals delivering the following:

  • Topic Title (approx. 10 words)
  • Organizers Name and Affiliation
  • Session Rationale and Outline (approx. 500 words); the rationale should stress the novelty of the topic and/or its multidisciplinary features (if any)
  • Session Paper List (min. 4 papers without more than 1 per involved research group) including the author(s) affiliation(s), paper title and abstract (approx. 100-200 words)

Proposals will be evaluated based on the timeliness of the topic, and the qualifications of organizers and contributors.

After Special Session proposals are approved, manuscripts may be submitted to the special session and should conform to the formatting and electronic submission guidelines of regular NANOARCH papers. The invited papers, which are part of accepted special sessions proposals, will undergo the same review process as Regular and Concept papers. If, at the end of the review process, three (3) or less papers are accepted, the special session will be cancelled and the accepted papers will be moved to regular sessions.

Proposals should be sent via e-mail to the Special Session Chairs by April 5, 2019 at the latest.

Submission Guidelines


Authors are invited to submit of up to 6 pages in length for the Regular Paper Sessions and Special Sessions and 2 pages in length for the Concept Paper Sessions in PDF version, double column with a minimum font size of 10 points on the symposium submission website (EasyChair). Author may choose to make submissions anonymous, although that is not mandatory. The electronic submission will be considered evidence that upon acceptance, the author(s) will present their paper at the symposium. Accepted and presented papers will be submitted for inclusion to IEEE Xplore and ACM Digital Library. All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript of novel unpublished work (not to exceed 6 pages of single spaced text, including figures and tables).

Papers must be in the formats described on submissions guidelines and using the IEEE templates that you can find at:
IEEE Manuscript Templates for Conference Proceedings

Accepted and Presented papers will be considered for NANOARCH Best Paper Award, and the conference content will be submitted for inclusion into IEEE Xplore and ACM Digital Library as well as other Abstracting and Indexing (A&I) databases.

After the conference, authors are invited to submit extended paper versions (containing at least 30% but preferably 50% new material), to pass the normal review process, for potential publication in an IEEE Transactions on Nanotechnology NANOARCH 2019 Special issue.

Registration


For the Registration process, please click the button below and fill the form
Registration Form

Category Before
June 15, 2019
After
June 15, 2019
Life Member 299 389
Member 450 518
Non-Member 580 650
*Student Member 299 369
*Student Non-Member 415 498

Registration Fee in USD. More details in the registration form page.
*Proof of student status is required


Important notes:
Full Registration and Student Registration fee includes:
  •  Access to the conference
  •  Conference bag, USB with the proceedings and certificate of attendance
  •  Coffee breaks, lunches and conference dinner

In addition, a Full Registration fee includes:
  •  One accepted paper presentation
Please do not forget to Register your accepted paper during the registration process


Author registration and payment should be completed before June 15, 2019 in order for the manuscript to be included in the NANOARCH 2019 Proceedings. Only accepted and presented papers will be included in Conference proceedings.

For any inquiry please email Registration Chair at: Xueqing Li


Visa Request

In case you need a Visa to visit Qingdao for the conference, please fill the form below and send it to nanoarch2019@hotmail.com.

Technical Committee

Mustafa Altun, Istanbul Technical University

Csaba Andras-Moritz, UMass Amherst

Lorena Anghel, Phelma Grenoble INP, TIMA Laboratory

Alon Ascoli, Technische Universität Dresden, Germany

Marc Bescond, CNRS-LIMMS, The University of Tokyo

Pierre Boulet, University Lille 1

Hao Cai, Southeast University, China

Ramon Canal, Universitat Politecnica de Catalunya, Spain

Meng-Fan Chang, National Tsing Hua University

Yiran Chen, Duke University

Xiang Chen, George Mason University, USA

Sorin Cotofana, Technische Universiteit Delft, The Netherlands

Catherine Dezan, UBO/Lab-STICC

Deliang Fan, University of Central Florida, USA

Joseph Friedman, The University of Texas at Dallas

Pierre-Emmanuel Gaillardon, University of Utah

Swaroop Ghosh, The Pennsylvania Stat University, USA

Bastien Giraud, CEA-Leti

Jie Han, University of Alberta

Yinhe Han, Institute of Computing Technology,CAS, China

Andreas Herkersdorf, Technical University of Munich

Jingtong Hu, University of Pittsburgh, USA

Daniel Ielmini, Politecnico di Milano

Li Jiang, Shanghai Jiao Tong University, China

Jacques-Olivier Klein, Institut d'Electronique Fondamentale

Sebastien Le-Beux, Lyon Institute of Nanotechnology (INL)

Qiang Li, University of Electronic Science and Technology of China, China

Weiqiang Liu, Nanjing University of Aeronautics and Astronautics

Yongpan Liu, Tsinghua University, China

Fabrizio Lombardi, Northeastern University, USA

Marisa Lopez-Vallejo, Universidad Politécnica de Madrid

Youyou Lu, Tsinghua University, China

Kartik Mohanram, University of Pittsburgh

Anca Molnos, CEA-LETI, France

Kundan Nepal, University of St Thomas

Michael Niemier, University of Notre Dame

Ian O'Connor, Lyon Institute of Nanotechnology

Vojin G. Oklobdzija, University of California, Davis

Alexandru Paler, Johannes Kepler University Linz, Austria

Damien Querlioz, IEF, University Paris-Sud

Garrett Rose, University of Tennessee

Daniele Rossi, University of Hertfordshire

Antonio Rubio, Universitat Politecnica de Catalunya, Spain

Liang Shi, East China Normal University, China

Georgios Ch. Sirakoulis, Democritus University of Thrace, Greece

Mircea Stan, University of Virginia

Adam Stieg, University of California, Los Angeles

Ronald Tetzlaff, Technische Universität Dresden, Germany

Elena Ioana Vatajelu, TIMA, France

Amit Trivedi, University of Illinois at Chicago

Lucian Vintan, "Lucian Blaga" University of Sibiu

Ioannis Vourkas, Universidad Técnica Federico Santa María

Lan Wei, University of Waterloo, Canada

Xiulong Wu, Anhui University, China

Chengmo Yang, University of Delaware, USA

Cunjiang Yu, University of Houston, USA

Lang Zeng, Beihang University, China

Qi Zhu, Northwestern University, USA

Conference Time-schedule

To be announced

Keynote Speakers


Kaushik Roy

"Stochastic & Neuromorphic Computing with Magnetic Tunnel Junctions: Prospects and Perspectives"

Kaushik Roy The trend towards ultra-low power logic and low leakage embedded memories for System-On-Chips, has prompted researcher to consider the possibility of replacing CMOS based memories with non-volatile technologies such as magnetic tunnel junctions. Compute-in-memories enabled by non-volatility can be exploited to develop efficient memory-centric neuromorphic computing fabrics. We have also observed that the magnetization dynamics under current driven magnetization switching mimics the leaky integrate and fire operation of spiking neurons while stochastic switching of a nano-magnets under thermal noise can be used to model stochastic neuron and synaptic behavior. Such computing with MTJ based devices can lead to orders of magnitude improvements (over standard CMOS based von-Neumann computing models) for solutions to complex dynamical systems including neural computing and combinatorial optimizations.

Xiaobo Sharon Hu

"Exploiting Ferroelectric FETs: From In-Memory Computing to Machine Learning and Beyond"

Kaushik Roy The inevitable slowdown of the CMOS scaling trend has fueled an explosion of research endeavors in finding a CMOS replacement. However, recent studies suggest that many of the emerging devices being investigated, if used as simple drop-in replacement for MOSFETs, may only achieve speedups that mirror historical trends in the best case. The consensus from the community is that cross-layer efforts are essential in combating the CMOS scaling challenge with emerging devices. This talk presents such an effort centered around a particular emerging device, ferroelectric FETs (FeFETs).
An FeFET is made by integrating a ferroelectric material layer in the gate stack of a MOSFET. It is a non-volatile device that can behave as both a transistor and a storage element. This unique property of FeFETs enables area efficient and low-power combined logic and memory, which are desirable for many data analytic and machine learning applications. This presentation will elaborate novel circuits/architectures based on FeFETs to accomplish computing in memory, ternary content addressable memory (TCAM) and crossbar arrays. Application-level benefits, particularly for machine learning, in comparison with other alternative technologies will be discussed.


Venue

Hyatt RegencyMemorable and Luxurious Urban Resort with Beachfront Access

Located on Shilaoren Beach and facing the iconic “Old Stone Man”, Hyatt Regency Qingdao is an urban resort in downtown Qingdao with beachfront access, just minutes from the city’s commercial center. The hotel’s floor-to-ceiling windows showcase a panoramic backdrop of the Yellow Sea, ensuring guests feel productive and energized, whether they are travelling for work or unwinding in celebration. Hyatt Regency Qingdao’s distinctive event facilities, resort ambiance and signature Hyatt hospitality make the hotel a leading choice for meetings, social gathering, and weddings. Find more at Hyatt Regency - Qingdao


Qingdao


Transportation

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